CD4027 Dual JK Flip Flop IC DIP-16 Package
CD4027 is a single monolithic chip integrated circuit containing two identical complementary- symmetry J-K masterslave flip-flops. Each flip-flop has provisions for individual J, K, Set Reset, and Clock input signals. Buffered Q and Q signals are provided as outputs. This input-output arrangement provides for compatible operation with the Intersil CD4013B dual D type flip-flop. The CD4027BMS is useful in performing control, register, and toggle functions. Logic levels present at the J and K inputs along with internal self-steering control the state of each flipflop; changes in the flip-flop state are synchronous with the positive-going transition of the clock pulse. Set and reset functions are independent of the clock and are initiated when a high-level signal is present at either the Set or Reset input. This product is known as CD4027 Dual JK Flip Flop, CD4027 JK Flip Flop, CD4027BE Dual JK Flip Flop, CD4027BE JK Flip Flop, CD4027BM96, CD4027BEE4, CD4027BM96E4, CD4027BPWR, CD4027BNSR, CD4027BM, CD4027BMT, CD4027BE, CD4027BPW, CD4027BME4, CD4027BPWRG4, CD4027BNSRG4.
Features/Specs:
- Logic Family: CD4000
- Series: CD4027B
- Function: Dual Master/Slave
- Product Category: Flip-Flops
- Number of Circuits: 2
- Logic Type: J-K Type Flip-Flop
- Polarity: Inverting/Non-Inverting
- Input Type: Single-Ended
- Output Type: Differential
- Number of Channels: 2
- Number of Input Lines: 2
- Number of Output Lines: 1
- Reset Type: Set, Reset
- Propagation Delay Time: 300 ns
- High Level Output Current: -1.5 mA
- Low Level Output Current: 1.5 mA
- Operating Supply Voltage: 3 ~ 18V
- Quiescent Current: 20 uA
- Operating Temperature: -55 ~ +125°C
- Mounting Style: Through Hole
- Package/Case: PDIP-16
- Weight: 1 gm
Application:
- Registers
- Counters
- Control circuits
Package Includes:
- 1 x CD4027 Dual JK Flip Flop IC DIP-16 Package
Datasheet: CD4027B
Note: Product Images are shown for illustrative purposes only and may differ from the actual product.
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