CD4015 Dual 4-Stage Shift Register IC DIP-16 Package

CD4015 Dual 4-Stage Shift Register IC DIP-16 Package

The MC14015B dual 4–bit static shift register is constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. It consists of two identical, independent 4–state serial–input/parallel–output registers. Each register has independent Clock and Reset inputs with a single serial Data input. The register states are type D master-slave flip–flops. Data is shifted from one stage to the next during the positive-going clock transition. Each register can be cleared when a high level is applied on the Reset line. These complementary MOS shift registers find primary use in buffer storage and serial–to–parallel conversion where low power dissipation and/or noise immunity is desired. The CD4015-series types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic package (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes). This product is known as CD4015 Dual 4-Stage Shift Register, CD4015 Dual Shift Register, CD4015 4-Stage Shift Register, CD4015 Shift Register, CD4015 4-Stage Shift Register CD4015BM96, CD4015BEE4, CD4015BE, CD4015BPW, CD4015BPWR, CD4015BM,CD4015BMT.

Features:

• Medium speed operation…12 MHz (typ.) clock rate at VDD – VSS = 10 V
• Fully static operation
• 8 master-slave flip-flops plus input and output buffering
• 100% tested for quiescent current at 20 V
• 5-V, 10-V, and 15-V parametric ratings
• Standardized, symmetrical output characteristics
• Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
• Noise margin (full package-temperature range) =
  1 V at VDD = 5 V
  2 V at VDD = 10 V
  2.5 V at VDD = 15 V
• Meets all requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ’B’ Series CMOS

Features/Specs:

• Logic Family: CD400
• Series: CD4015B
• Function: Dual 4 Stage Static
• Product Category: Counter Shift Registers
• Counting Sequence: Serial to Parallel
• Number of Circuits: 2
• Number of Bits: 4 bit
• Logic Type: CMOS
• Number of Input Lines: 1
• Propagation Delay Time: 320 ns, 160 ns, 120 ns
• Operating Supply Voltage: 3 ~ 18V
• Operating Temperature Range: -55 ~ +125°C
• Number of Output Lines: 4
• Product Type: Counter Shift Registers
• Mounting Style: Through Hole
• Package/Case: PDIP-16
• Weight: 1 gm

Applications:

• Serial-input/parallel-output data queueing
• Serial to parallel data conversion
• General-purpose register

Package Includes:

• 1 x CD4015 Dual 4-Stage Shift Register IC DIP-16 Package

Datasheet: CD4015 IC Dual Shift Register

Note: Product Images are shown for illustrative purposes only and may differ from the actual product.