74LS73 Dual JK Flip-Flop With Clear IC – DIP-14 Package
The 74LS73 device contains two independent negative-edge-triggered J-K flip-flops with complementary outputs. The J and K data is processed by the flip-flops on the falling edge of the clock pulse. The clock triggering occurs at a voltage level and is not directly related to the transition time of the negative-going edge of the clock pulse. The data on the J and K inputs are allowed to change while the clock is HIGH or LOW without affecting the outputs as long as setup and hold times are not violated. Featured by Sharvi Electronics A low logic level on the clear input will reset the outputs regardless of the levels of the other inputs.
This product is known as SN74LS73ANE4, SN74LS73ADR, SN74LS73AN, SN74LS73AD, SN74LS73ADRG4, 7473 IC, 7473 SMD IC, 74LS73 IC, 74LS73 SMD IC, Dual JK Flip-Flop IC, Dual JK Flip-Flop SMD IC.
Features/Specs:
- Part No: SN74LS73N
- Manufacturer: Texas Instruments
- Function: JK-Master-Slave Type
- Logic Family: LS
- Product Type: Flip Flops
- Logic Type: J-K Type Flip-Flop
- Number of Circuits: 2
- Polarity: Inverting/Non-Inverting
- Input Type: TTL
- Output Type: TTL
- Propagation Delay Time: 20 ns
- High Level Output Current: – 0.4 mA
- Low Level Output Current: 8 mA
- Number of Channels: 2
- Number of Input Lines: 3
- Number of Output Lines: 1
- Operating Supply Voltage: 4.75V ~ 5.25V
- Operating Temperature Range: 0°C ~ +70°C
- Reset Type: Reset
- Mounting Style: Through Hole
- Package/Case: PDIP-14
Applications:
- Shift Registers
- Memory/Control Registers
- EEPROM circuits
- Latching devices
Datasheet: 74LS73
Package Includes:
- 1 x 74LS73 Dual JK Flip-Flop With Clear IC – DIP-14 Package
Note: Product Images are shown for illustrative purposes only and may differ from the actual product.
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