74LS73 Dual JK Flip-Flop with Clear IC (7473 IC) Package-DIP-14
The 74LS73 device contains two independent negative-edge-triggered J-K flip-flops with complementary outputs. The J and K data is processed by the flip-flops on the falling edge of the clock pulse. The clock triggering occurs at a voltage level and is not directly related to the transition time of the negative-going edge of the clock pulse. The data on the J and K inputs are allowed to change while the clock is HIGH or LOW without affecting the outputs as long as setup and hold times are not violated. Featured by Sharvi Electronics A low logic level on the clear input will reset the outputs regardless of the levels of the other inputs.
- Supply Voltage: 7V
- Input Voltage: 7V
- Two Independent Negative Edge Triggered JK Flip-Flops
- Clear Input Resets the Output
- Fast Switching Times
- Standard TTL Switching Voltages
- Operating free-air temperature range: 0°C ~ +70°C
- Storage temperature range: –65°C ~ +150°C
- Mounting Style: Through Hole
- Package/Case: DIP-14
- 1 x 74LS73 Dual JK Flip-Flop with Clear IC (7473 IC) Package-DIP-14
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